A Modular and Open Framework to Explore Integrated Processing on Brain-Computer Interfaces
Paper accepted at IEEE EMBC 2025

A very fast and efficient hardware (verilog + FPGA) implementation of the boids flocking algorithm.

A fully functioning 5 stage, pipelined, bypassed CPU made using Verilog from the ground up.

An ios app that can detect skin cancer, and provide important environmental and location
based information for melanoma.

A cost-effective arduino project to detect dust on solar panels.

Yale BCI, Checker chip, SAT accelerator